Big Chips

scaling (that is, Dennard scaling) provided three benefits: doubling of integration capacity to deliver twice the number of transistors per unit area every two years at constant price, increased transistor performance, and reduced energy per transistor. With the steady erosion of the latter two benefits, the low-hanging fruit for performance increase has been to exploit integration capacity via multithreading, multicore, and now many-core. Indeed, a basic premise of multicore has been that, by scaling supply voltage and using more transistors, one can deliver improved throughput with lower power. On the other hand, the erosion of energy per transistor raises the specter of dark silicon: with constant power budgets but increasing power densities, an ever-smaller portion of the chip can be on at any given moment. This suggests that architects can shrink die sizes, rather than integrate unusable transistors , as transistor budgets meet hard power limits across both mobile and server product spaces. Why, then, does the industry still produce big chips? In a personal communication, Shekhar Borkar, an Intel Fellow, notes the steady stream of creative ways in which integration capacity has been exploited: aggressive supply-voltage scaling with more transistors, new paradigms in computation such as special-purpose hardware and accelerators for higher power efficiency, and implementation of more functions on a chip than can be afforded power-wise, along with fine-grained power management to activate selectively what can be afforded at any given point in time. Borkar concludes, ''All of this will require tremendous transistor integration capacity, and there will be no dark silicon. Therefore, big chips will continue to have a future.'' Indeed, recent chip sizes from IBM and Intel have been in the 500 to 600 mm 2 range, exceeding the values posited in recent editions of the International Technology Roadmap for Semiconductors. At the 45-nm technology node, with eight cores per socket, IBM's Power7 chip is 567 mm 2 , and Intel's Nehalem-EX chip is 684 mm 2. Tilera has integrated 64 cores in a single chip, and Intel's research vehicle, the Single Chip Cloud, has 48 cores. As the semiconductor industry strives to keep Moore's law on track with respect to utility in future processor products, futures that avoid ''big'' (transistor counts) and ''many'' (cores) are difficult to envision. Thus, a fundamental challenge for the future will be the intelligent use of silicon area to maximize performance while keeping power and packaging costs within budget. As …